Embodiments of the present invention relate to a tester. Further embodiments relate to a system comprising a tester and an extension circuit. Further embodiments relate to a method for determining the source reflection coefficient of a source and measuring device of a tester. Some embodiments relate to a vector based in-system power calibration.
With the need of many RF (RF=radio frequency) ports in ATE (ATE=automatic test equipment) systems it becomes more and more challenging to keep the overall calibration time low or even reduce it. To get additional RF ports more switches are used in a fan out structure which degrades RF performance.
FIG. 1 shows a block diagram of a conventional power calibration setup 10. The conventional power calibration setup 10 consists of a main circuit 12, a connection circuit 14, an external circuit 16, RF ports 18 and a power sensor 20.
As indicated in FIG. 1, one conventional method of a power calibration at each port 18 is the measuring of the absolute power at each port 18 over frequency when it is terminated with the reference impedance of the system (Z0). The technique can achieve very accurate results but costs time and is only appropriate with small port counts.
As disclosed in the WO 2012/084028, another approach is to use the external circuit for the fan out structure and an integrated power sensor that measures the RF input power at the TX port and transforms it with the known path loss to all other ports. This concept reduces calibration time by factor X.
But this is only valid for a 50Ω system, which means a 50Ω load and a 50Ω source connected with a 50Ω connection circuit. In reality, the output match is not 50Ω, it is a complex impedance. In addition, the input match of the power sensor and the match of every other through path is not 50Ω due to series resistance of RF switches and signal routing with VIAs and connectors, just like the connection circuit is not a 50Ω system too. This leaves an unknown mismatch error (ripple) that directly impacts power accuracy, as will become clear from FIGS. 2a and 2b. 
FIG. 2a shows in a diagram 30 the insertion loss of a non 50Ω connection circuit with a 50Ω source and a 50Ω load (first curve 32), and the insertion loss of the non 50Ω connection circuit with a non 50Ω source and a non 50Ω load (second curve 34). Thereby, the ordinate denotes the insertion loss in dB, where the abscissa denotes the frequency in GHz.
FIG. 2b shows in a diagram 36 the resulting mismatch error of the non 50Ω connection circuit with the non 50Ω source and the non 50Ω load (third curve 38). Thereby the ordinate denotes the mismatch error in dB, where the abscissa denotes the frequency in GHz.